The Impact of Ultra Thin ALD TiN Metal Gate on Low Frequency Noise of CMOS Transistors.

Inserting a thin metal layer at the Poly-Si/dielectric interface to eliminate gate depletion and boron penetration has recently attracted a considerable attention from the engineering community due to the compatibility of this metal gate stack with conventional poly-Si technology. In this contribution we use CMOS transistors with TiN metal gate of different number of deposition cycles on 2nm SiON gate oxide as a test vehicle to evaluate the work function control and eventual modifications of the interfaces and gate oxide quality. The flexibility in the work function control comes at a cost of degraded performances for lowest deposition cycles corresponding to the band edge work functions. © 2007 American Institute of Physics [ABSTRACT FROM AUTHOR]