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Low-Cost Scan Test for IEEE-1500-Based SoC.
- Source :
-
IEEE Transactions on Instrumentation & Measurement . May2008, Vol. 57 Issue 5, p1071-1078. 8p. 5 Black and White Photographs, 9 Diagrams, 3 Charts. - Publication Year :
- 2008
-
Abstract
- In this paper, a reduced-pin-count-testing technique is presented to control the IEEE-1500 wrapper through the IEEE-1149.1 TAP for scan delay test. By using only the IEEE- 1149.1 TAP control pins as test-access pins and by embedding an on-chip test clock generator, low-cost automated test equipment (ATE) can be efficiently utilized to reduce testing costs. Experiments show the effectiveness of our technique in utilizing the ATE channels and scan delay testing. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189456
- Volume :
- 57
- Issue :
- 5
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Instrumentation & Measurement
- Publication Type :
- Academic Journal
- Accession number :
- 31600166
- Full Text :
- https://doi.org/10.1109/TIM.2007.911699