Design of a fully digital controller for a shunt three-phase active filter using VHDL-AMS language.

In this article, the authors detail a top-down design methodology for a power electronic fully digital controller based on a field programmable gate array (FPGA). This design flow uses the very high speed hardware description languages-analogue mixed signal (VHDL-AMS) language. The case of a shunt three-phase active filter is studied. An optimised architecture is designed and each step is detailed. Each block of the architecture is modelled in the VHDL at several levels of abstraction, from real data format to specific binary format. To achieve closed-loop simulation, analogue and power elements are modelled in the VHDL-AMS. The whole closed-loop system is successfully validated at various levels of abstraction of the digital control, using the ADVanceMS computer-aided design tools. An experimental validation of the proposed architecture, implemented on the target Xilinx Virtex-II 2V4000bf95 FPGA is discussed. [ABSTRACT FROM AUTHOR]