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Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Dec2008, Vol. 55 Issue 11, p3628-3640. 13p. 5 Black and White Photographs, 1 Diagram, 3 Charts, 1 Graph. - Publication Year :
- 2008
-
Abstract
- Low-density parity-check convolutional codes (LDPC-CCs) have demonstrated comparable error-correcting performance to LDPC block codes (LDPC-BCs). However, the LDPC-CC encoder requires termination when applied to finite-length data frames to ensure that the trailing information bits are fully protected. In this paper, the LDPC-CC encoder design is investigated, and a novel termination scheme is proposed. Starting from any encoder state, the proposed scheme is capable of generating a termination sequence in hardware without padding, thus minimizing the rate loss due to termination. A high-speed architecture for LDPC-CC encoders with built-in termination is proposed. Synthesis results for LDPC-CCs of code memory size up to 512 demonstrate maximum encoding through puts of around 1 Gb/s for a 90-nm CMOS technology. The implementation cost for such encoders is shown to be reasonably low for average-sized LDPC-CCs. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 55
- Issue :
- 11
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 36347827
- Full Text :
- https://doi.org/10.1109/TCSI.2008.925813