Cite
Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs.
MLA
Pathak, Mohit, and Sung Kyu Lim. “Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, vol. 28, no. 9, Sept. 2009, pp. 1373–86. EBSCOhost, https://doi.org/10.1109/TCAD.2009.2024707.
APA
Pathak, M., & Sung Kyu Lim. (2009). Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 28(9), 1373–1386. https://doi.org/10.1109/TCAD.2009.2024707
Chicago
Pathak, Mohit, and Sung Kyu Lim. 2009. “Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 28 (9): 1373–86. doi:10.1109/TCAD.2009.2024707.