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A Physics-Based Compact Model of III-V FETs for Digital Logic Applications: Current-Voltage and Capacitance-Voltage Characteristics.

Authors :
Oh, Saeroonter
Wong, H.-S. Philip
Source :
IEEE Transactions on Electron Devices. Dec2009, Vol. 56 Issue 12, p2917-2924. 8p. 2 Diagrams, 1 Chart, 8 Graphs.
Publication Year :
2009

Abstract

A physics-based analytical compact model of InGaAs field-effect transistors (FETs) for digital logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation while capturing the essential physics, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures short channel effects, trapezoidal-shape quantum-well energies, bias-dependent ballistic ratios, and capacitances including 2-D potential profile information. Each is verified via numerical calculations and 2-D electrostatic simulation, followed by a comparison o the model I-V characteristics with experiment data. Finally, the transient response of FO4 inverters demonstrates the use of the compact model for future technology circuit simulations. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
56
Issue :
12
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
47399970
Full Text :
https://doi.org/10.1109/TED.2009.2033411