Patterned ZnO nanorods network transistor fabricated by low-temperature hydrothermal process

Abstract: The ZnO nanorods network transistor fabricated by the hydrothermal process has been demonstrated. Bottom-gate structure was selected and the source-drain electrodes were formed by the conventional lift off process. After the deposition of ZnO seed layer by the sol–gel method, the channel region was defined by the HCl etching. Then the ZnO nanorods selectively grew on the channel region with the help of patterned seed layer. The device obeys the n-type depletion mode with the I on/I off ratio of 103 and field-effect mobility of 6.7cm2/Vs. The fabrication temperature of the whole process is below 300°C which has great potential in the application on the transparent substrate. [Copyright &y& Elsevier]