AN ANALYTICAL CONGESTION MODEL WITH BOUNDED-BEND DETOURS.

With the increase of the complexity of circuits, fast estimation can provide some vital information for optimal layout decisions. Fast congestion prediction plays an important role in the physical layout of VLSI design. In this paper, we present a probabilistic estimation approach with via minimization constraints. Our model is more realistic than previous models. It has more flexibility for wires to have more usage area to bypass congested regions and blockages. The experiment on routing benchmarks demonstrates the effectiveness of our approach. [ABSTRACT FROM AUTHOR]