Back to Search Start Over

An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics.

Authors :
Fujishima, Hideyuki
Takemoto, Yusuke
Onoye, Takao
Shirakawa, Isao
Source :
IEEE Transactions on Circuits & Systems for Video Technology. Mar99, Vol. 9 Issue 2, p306-314. 9p. 14 Diagrams.
Publication Year :
1999

Abstract

An architecture of a matrix-vector multiplier (MVM) is devised, which is dedicated to MPEG-4 natural/synthetic video decoding. The MVM can perform the matrix-vector multiplication both in the inverse discrete cosine transform (IDCT) and in the geometrical transformation of three-dimensional computer graphics (3-D CG); or, specifically, it can achieve the multiplication of a 4×4 matrix by a four-tuple vector necessary in the one-dimensional IDCT for eight pixels and in the geometrical transformation for a point in a 3-D space. This paper describes a new architecture of this MVM and also shows the implementation result of a functional module composed of four MVMs with the use of 440-k transistors, which can operate at 20 MHz or less [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
10518215
Volume :
9
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems for Video Technology
Publication Type :
Academic Journal
Accession number :
52000917
Full Text :
https://doi.org/10.1109/76.752097