A New Class of Charge-Trap Flash Memory With Resistive Switching Mechanisms.

This paper presents a new class of charge-trap Flash memory device with resistive switching mechanisms. We propose a fused memory scheme using a structure of metal/\Pr0.7 \Ca0.3\MnO3 (PCMO)/nitride/oxide/silicon to graft fast-switching features of resistive random access memory onto high-density silicon/oxide/nitride/oxide/silicon memory structures. In this scheme, both program and erase (P/E) are performed by the conduction of the carriers that are injected from the gate into the nitride layer through the PCMO, which is a resistive switching material; the resistance state determines whether a program or erase function is performed. In the proposed memory devices, we observed improved memory characteristics, including the current–voltage hysteresis having a resistive ratio exceeding three orders of magnitude at a set voltage of \pm4.5 V, a memory window of 2.3 V, a P/E speed of 100 ns/1 ms, data retention of ten years, and endurance of \10^5 P/E cycles. This approach will offer critical clues about how one can best implement universal features of nonvolatile memories in a single chip. [ABSTRACT FROM PUBLISHER]