Impact of HfTaO Buffer Layer on Data Retention Characteristics of Ferroelectric-Gate FET for Nonvolatile Memory Applications.

A p-channel metal–ferroelectric–insulator–silicon field-effect transistor (FET) with a 300-nm-thick \SrBi2\Ta2\O9 (SBT) ferroelectric film and a 10-nm-thick HfTaO layer on silicon substrate was fabricated and characterized. The device shows a nearly unchanged memory window of about 0.9 V after a \2 \times \10^11-cycles fatigue test, an on/off current ratio of more than \10^7, and a field-effect mobility of approximately 42 \cm^2/\V \cdot \s. Moreover, a drain-current on/off ratio as high as \10^5 was obtained with a fixed gate voltage of 2.5 V after over a \10^5-s elapsed time without any obvious degradation. These results may suggest that the Pt/SBT/HfTaO/Si FET is suitable for high-performance ferroelectric memory. [ABSTRACT FROM AUTHOR]