Cite
Transistor Mismatch Properties in Deep-Submicrometer CMOS Technologies.
MLA
Yuan, Xiaobin, et al. “Transistor Mismatch Properties in Deep-Submicrometer CMOS Technologies.” IEEE Transactions on Electron Devices, vol. 58, no. 2, Feb. 2011, pp. 335–42. EBSCOhost, https://doi.org/10.1109/TED.2010.2090159.
APA
Yuan, X., Shimizu, T., Mahalingam, U., Brown, J. S., Habib, K. Z., Tekleab, D. G., Su, T.-C., Satadru, S., Olsen, C. M., Lee, H., Pan, L.-H., Hook, T. B., Han, J.-P., Park, J.-E., Na, M.-H., & Rim, K. (2011). Transistor Mismatch Properties in Deep-Submicrometer CMOS Technologies. IEEE Transactions on Electron Devices, 58(2), 335–342. https://doi.org/10.1109/TED.2010.2090159
Chicago
Yuan, Xiaobin, Takashi Shimizu, Umashankar Mahalingam, Jeffrey S. Brown, Kazi Z. Habib, Daniel G. Tekleab, Tai-Chi Su, et al. 2011. “Transistor Mismatch Properties in Deep-Submicrometer CMOS Technologies.” IEEE Transactions on Electron Devices 58 (2): 335–42. doi:10.1109/TED.2010.2090159.