Power efficient multi-stage CMOS rectifier design for UHF RFID tags

Abstract: Power efficiency of a UHF rectifier circuit, which is part of long-range IC-based passive RFID tags, has become a serious bottleneck in implementing power-hungry intelligent sensors. This paper presents an analytical approach for multi-stage rectifiers, which provides design tradeoffs as well as a set of design rules to improve power efficiency of the rectifier. As an example, three-stage rectifiers are designed with ST 90nm CMOS technology for optimized performance at both 10 and 22m distances. When compared with existing results at the same level of output power, the proposed rectifiers show a 3× better performance in power efficiency (73%) and 55% reduction in power-up threshold with longer operating range. [Copyright &y& Elsevier]