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Bandwidth Enhancement With Low Group-Delay Variation for a 40-Gb/s Transimpedance Amplifier.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Aug2010, Vol. 57 Issue 8, p1964-1972. 9p. - Publication Year :
- 2010
-
Abstract
- A 40-Gb/s transimpedance amplifier (TIA) is proposed using multistage inductive-series peaking for low group-delay variation. A transimpedance limit for multistage TIAs is derived, and a bandwidth-enhancement technique using inductive-series \pi-networks is analyzed. A design method for low group delay constrained to 3-dB bandwidth enhancement is suggested. The TIA is implemented in a 0.13-\mu\ m CMOS process and achieves a 3-dB bandwidth of 29 GHz. The transimpedance gain is 50 \ dB\cdot\Omega, and the transimpedance group-delay variation is less than 16 ps over the 3-dB bandwidth. The chip occupies an area of 0.4 \ mm^2, including the pads, and consumes 45.7 mW from a 1.5-V supply. The measured TIA demonstrates a transimpedance figure of merit of 200.7 \Omega/\pJ. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 57
- Issue :
- 8
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 62330645
- Full Text :
- https://doi.org/10.1109/TCSI.2010.2041502