A High-Resolution (< 10~ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA).

MLA

Bayer, Eugen, and Michael Traxler. “A High-Resolution (< 10~ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA).” IEEE Transactions on Nuclear Science, vol. 58, no. 4, Aug. 2011, pp. 1547–52. EBSCOhost, https://doi.org/10.1109/TNS.2011.2141684.

APA

Bayer, E., & Traxler, M. (2011). A High-Resolution (< 10~ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA). IEEE Transactions on Nuclear Science, 58(4), 1547–1552. https://doi.org/10.1109/TNS.2011.2141684

Chicago

Bayer, Eugen, and Michael Traxler. 2011. “A High-Resolution (< 10~ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA).” IEEE Transactions on Nuclear Science 58 (4): 1547–52. doi:10.1109/TNS.2011.2141684.