Dielectric Relaxation and Charge Trapping Characteristics Study in Germanium Based MOS Devices With \HfO2/\Dy2\O3 Gate Stacks.

In this paper, we investigate the dielectric relaxation effects and charge-trapping characteristics of \HfO2/\Dy2\O3 gate stacks grown on Ge substrates. The metal-oxide-semiconductor devices have been subjected to constant voltage stress (CVS) conditions at accumulation and show relaxation effects in the whole range of applied stress voltages. Applied voltage polarities, as well as thickness dependence of the relaxation effects, have been investigated. Charge trapping is negligible at low stress fields, whereas, at higher fields (> 4 MV/cm), it becomes significant. In addition, we give experimental evidence that, in tandem with the dielectric relaxation effect, another mechanism—the so-called Maxwell-Wagner instability—is present and affects the transient current during the application of a CVS pulse. This instability is also found to be field dependent, thus resulting in a trapped charge that is negative at low stress fields but changes to positive at higher fields. [ABSTRACT FROM AUTHOR]