Cite
Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations.
MLA
Li, Bing, et al. “Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, vol. 31, no. 11, Nov. 2012, pp. 1670–83. EBSCOhost, https://doi.org/10.1109/TCAD.2012.2202393.
APA
Li, B., Chen, N., & Schlichtmann, U. (2012). Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 31(11), 1670–1683. https://doi.org/10.1109/TCAD.2012.2202393
Chicago
Li, Bing, Ning Chen, and Ulf Schlichtmann. 2012. “Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 31 (11): 1670–83. doi:10.1109/TCAD.2012.2202393.