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On Computing Criticality in Refactored Timing Graphs.

Authors :
Chung, Jaeyong
Abraham, Jacob A.
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Dec2012, Vol. 31 Issue 12, p1935-1939. 5p.
Publication Year :
2012

Abstract

The maximum operator in statistical static timing analysis (SSTA) is a decent approximation for timing sign-off, but often causes significant error in SSTA applications. This paper presents a timing criticality computation method based on non-maximum analytic operators in a parameterized SSTA. After an SSTA run, the proposed method computes the criticality for all edges and nodes in a single graph traversal. Although we do not employ the max operator in the computation process, the error in the maximum operator still degrades the accuracy of the computed criticality because the criticality is a joint probability of expressions, including arrival times, which are computed by the maximum operator during SSTA. To address this issue, we employ the refactoring technique, which was recently proposed to reduce common path pessimism in combinational circuits. This paper shows that refactoring is also very useful in reducing the maximum-induced error in arrival times, and how existing graph-based algorithms can be geared toward refactoring. Our experimental results show that the proposed method reduces the error of the criticality significantly compared to the conventional cutset-based method. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780070
Volume :
31
Issue :
12
Database :
Academic Search Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
83467215
Full Text :
https://doi.org/10.1109/TCAD.2012.2213819