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A 45-nm SOI CMOS Integrate-and-Dump Optical Sampling Receiver.

Authors :
Gathman, Timothy D.
Buckwalter, James F.
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Feb2013, Vol. 60 Issue 2, p469-478. 10p.
Publication Year :
2013

Abstract

An integrate-and-dump receiver based on an active feedback integrator is demonstrated in a 45-nm SOI CMOS process. The integrate-and-dump receiver provides matched filtering for non-return-to-zero, return-to-zero, and pulse amplitude modulation digital modulation formats, resulting in high SINAD as well as inherent anti-aliasing/low-pass filtering for a 2 GS/s high linearity/high-dynamic-range optical sampling receiver. The measured SINAD is greater than 28 dBc with a sinusoidal input up to 1 GHz; the SNR is greater than 29 dBc. The 2-GS/s integrate-and-dump receiver consumes less than 100 mW. The chip area is 0.980x0.762 mm^2 including the pads. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
60
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
85169701
Full Text :
https://doi.org/10.1109/TCSI.2012.2215797