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A 1.65 W Fully Integrated 90 nm Bulk CMOS Capacitive DC--DC Converter With Intrinsic Charge Recycling.

Authors :
Meyvaert, Hans
Van Breussegem, Tom
Steyaert, Michiel
Source :
IEEE Transactions on Power Electronics. Sep2013, Vol. 28 Issue 9, p4327-4334. 8p.
Publication Year :
2013

Abstract

A fully integrated high power density capacitive 2:1 step-down DC–DC converter is designed in a standard CMOS technology. The converter implements the presented flying well technique and intrinsic charge recycling technique to deliver a maximum output power of 1.65 W on a chip area of 2.14 mm^2, resulting in a power conversion density of \0.77\, \W/mm^2. A peak power conversion efficiency of \69\\% is achieved, leading to an efficiency enhancement factor of +\36\\% with respect to a linear regulator. This is for a voltage step-down conversion from twice the nominal supply voltage of a \90 nm technology (\2V{\bf dd} = \2.4\, \V) to \1\, \V. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
08858993
Volume :
28
Issue :
9
Database :
Academic Search Index
Journal :
IEEE Transactions on Power Electronics
Publication Type :
Academic Journal
Accession number :
85705507
Full Text :
https://doi.org/10.1109/TPEL.2012.2230339