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The Partial Silicon-on-Insulator Technology for RF Power LDMOSFET Devices and On-Chip Microinductors.
- Source :
-
IEEE Transactions on Electron Devices . Dec2002, Vol. 49 Issue 12, p2271. 8p. 5 Black and White Photographs, 11 Diagrams, 6 Graphs. - Publication Year :
- 2002
-
Abstract
- A new partial silicon-on-insulator (SOI) formation technology and the associated RF LDMOSFET device structure on silicon bulk substrate are proposed in this paper. The same technology can also be applied to enhance the quality factor of the integrated on-chip microinductors. The proposed technology is able to reduce both drain/substrate parasitics and leakage current tier devices fabricated on bulk substrate. At the same time, the approach overcomes the thermal problem encountered by devices fabricated on full-SOI substrate. To demonstrate the technology, both partial-SOI LDMOSFET and microinductor devices were fabricated on bulk wafer with their RF performance verified by laboratory measurements. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 49
- Issue :
- 12
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 9202302
- Full Text :
- https://doi.org/10.1109/TED.2002.807459