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Materials basis for a six level epitaxial HTS digital circuit process.

Authors :
Talvacchio, J.
Forrester, M.G.
Hunt, B.D.
McCambridge, J.D.
Young, R.M.
Zhang, X.F.
Miller, D.J.
Source :
IEEE Transactions on Applied Superconductivity. 1997, Vol. 7 Issue 2, p2051-2056. 6p.
Publication Year :
1997

Abstract

We have developed a process for fabrication of HTS single-flux-quantum logic circuits based on edge SNS junctions which requires six epitaxial film layers and six mask levels. The process was successfully applied to fabrication of small-scale circuits (/spl les/10 junctions). This paper examines the materials properties affecting the reproducibility of YBCO-based SNS junctions, the low inductance provided by an integrated YBCO ground plane, and electrical isolation by SrTiO/sub 3/, or Sr/sub 2/AlTaO/sub 6/, ground-plane and junction insulator layers. Some of the critical processing parameters identified by electrical measurements, TEM, SEM, and AFM were control of second-phase precipitates in YBCO, oxygen diffusion, Ar ion-milling parameters, and preparation of surfaces for subsequent high-temperature depositions. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
10518223
Volume :
7
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Applied Superconductivity
Publication Type :
Academic Journal
Accession number :
93047229
Full Text :
https://doi.org/10.1109/77.620994