Asymmetric Driving Current Modification of CMOS LTPS-TFTs With HfO2 Gate Dielectric.

In this paper, the asymmetric driving current Idrv modification of CMOS low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO{2} gate dielectric is demonstrated by the interfacial layer (IL) engineering of HfO{2}/poly-Si interface. P-channel LTPS-TFT has much higher Idrv\sim 0.789~mA than the n-channel LTPS-TFT \sim0.274~mA under the same overdrive gate voltage. This asymmetric Idrv is due to the characteristics of field effect mobility \muFE that p-channel LTPS-TFT has much higher hole \muFE\sim 80.16~cm^{{2}}/Vs than the electron \muFE\sim 38.26~cm^{{2}}/V~s of n-channel LTPS-TFT. The modification of HfO{2}/poly-Si interface by O{2} plasma can enhance the electron \muFE\sim {34\%} and reduce the hole \muFE\sim{22.4\%}, resulting in balanced Idrv of CMOS LTPS-TFTs that n-channel device shows Idrv\sim 0.553~mA and p-channel device shows Idrv\sim 0.590~mA. In addition, the phonon scattering would also be improved by the IL growth and recovered to initial condition after IL removal. Consequently, the IL engineering of CMOS LTPS-TFTs with HfO{2} gate dielectric would be a good candidate for the application of system-on-panel or 3-D integrated circuits. [ABSTRACT FROM AUTHOR]