REVAMP STUDY OF RECONFIGURABLE LOGIC USAGE FOR COMPUTING ACCELERATION.

The aim. The article is to prove effectiveness of reconfigurable logic usage for computing acceleration. In order to prove this hypothesis, some experiments were conducted. Methodology. For this purpose, in the following paper examples of popular acceleration procedures were shown and quantitative comparison of different acceleration procedures with and without usage of reconfigurable logic devices was found. As examples an implementations of image filtering algorithm and implementations of matrix-vector multiplication were used. As the result of the hypothesis examination, the author found that usage of reconfigurable logic makes sense. For examples mentioned above, there is significant productivity increase was achieved. However, one should understand that an ideal case was examined, when implementations of algorithms mentioned above was made by man, not computer. Automatic algorithm porting to reconfigurable logic may yield much worse results. Metrics used for porting to reconfigurable platform quality evaluation were using for the first time. A challenge of computing acceleration and effective utilization of chip area is very actual nowadays. [ABSTRACT FROM AUTHOR]