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Tools verify, test VHDL designs.

Authors :
Tuck, Barbara
Source :
Computer Design. Oct1995, Vol. 34 Issue 10, p24. 1/3p.
Publication Year :
1995

Abstract

Reports on verification and testing tools for application specific integrated circuit (ASIC)-based systems. Synopsys' VHDL System Simulator; VEDA Design Automation's VerdictFault VHDL fault simulator; Development plans.

Subjects

Subjects :
*APPLICATION-specific integrated circuits
*COMPUTER software
*VHDL (Computer hardware description language)

Details

Language :
English
ISSN :
00104566
Volume :
34
Issue :
10
Database :
Academic Search Index
Journal :
Computer Design
Publication Type :
Periodical
Accession number :
9510202569

Tools

Authors Abstract Subjects Details