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Deep submicron changes the face of verification.

Authors :
Tuck, Barbara
Source :
Computer Design. Oct1995, Vol. 34 Issue 10, p85. 7p. 1 Color Photograph, 1 Diagram, 1 Chart.
Publication Year :
1995

Abstract

Discusses coping with deep submicron in integrated circuit (IC) design. Static-timing analysis; Timing consistency; Static, dynamic timing; Cost versus time; Emulation for submicron application specific integrated circuits (ASIC); Simulating at high level; Accelerating simulation; Formal verification. INSETS: Using formal verification for.., by Christian Berthet.;Five-million-gate ASIC project signed off with static...

Subjects

Subjects :
*INTEGRATED circuit design

Details

Language :
English
ISSN :
00104566
Volume :
34
Issue :
10
Database :
Academic Search Index
Journal :
Computer Design
Publication Type :
Periodical
Accession number :
9510202605