A 100 MHz Two-Phase Four-Segment DC-DC Converter With Light Load Efficiency Enhancement in 0.18~\mum CMOS.

This paper describes a high switching frequency CMOS DC-DC converter employing phase shedding/segmentation and resonant gate drivers to improve light load efficiency. A novel output inductor network with positively coupled inductors between segments and negatively coupled inductors between phases is adopted in two-phase four-segment interleaved topology to improve effective inductance and reduce inductor current ripple. To limit the contribution of the gate driver to the total converter loss under light and medium loads, a new combined high-side and low-side resonant type gate driver with partially shared inductor is presented. The DC-DC converter is implemented in 0.18~\mum six-metal CMOS technology with 5 V power devices and occupies a total area of 2.55 mm \times 3.0 mm. It converts 4 V input to 1 to 3 V output with peak 1.78 A current under 100 MHz switching frequency. The measured peak efficiency is 77.4% at 5.95 W output power and the tracking mode bandwidth can reach up to 8 MHz. With resonant gate drivers, 5% efficiency improvement can be reached at 1 V output. Furthermore, the converter is able to maintain peak efficiency as the output current varies from 0.1 A to 1.86 A. [ABSTRACT FROM PUBLISHER]