Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted N-MOSFETs

Low-frequency noise is for the first time investigated in 0.12 μm Partially Depleted (PD) Silicon-On-Insulator (SOI) N-MOSFETs in comparison with established results on the 0.25 μm SOI CMOS technology node. The transfer and output characteristics of the devices are first addressed as well as an evaluation of the static performances. Then, we present low-frequency noise measurements carried out in both linear and saturation regimes taking into consideration the usually admitted <f>1/f</f> noise models in MOS devices and their applicability in our case. A comparison is achieved with previously published results on 0.25 μm PD SOI N-MOSFETs, showing the drain current noise spectral densities, as well as the Kink-related excess noise occurring in the saturation regime. [Copyright &y& Elsevier]