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A bus-monitoring model for MPEG video decoder design.
- Source :
-
IEEE Transactions on Consumer Electronics . Aug97, Vol. 43 Issue 3, p526. 5p. 6 Diagrams, 2 Charts, 2 Graphs. - Publication Year :
- 1997
-
Abstract
- Presents a model and a simulator to aid Motion Picture Experts Group (MPEG) decoder design by providing useful statistics related to bus utilization and waiting cycles. MPEG decoder architecture and data nature; Results on the analysis of bus bandwidth and determining proper sizes of decoder input/output (I/O) buffers connected to the bus; Conclusions.
- Subjects :
- *SIMULATION methods & models
*DECODERS (Electronics)
Subjects
Details
- Language :
- English
- ISSN :
- 00983063
- Volume :
- 43
- Issue :
- 3
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Consumer Electronics
- Publication Type :
- Academic Journal
- Accession number :
- 9711074451
- Full Text :
- https://doi.org/10.1109/30.628670