Cite
Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator.
MLA
Pedram, Ardavan, et al. “Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator.” IEEE Transactions on Computers, vol. 63, no. 8, Aug. 2014, pp. 1854–67. EBSCOhost, https://doi.org/10.1109/TC.2014.2315627.
APA
Pedram, A., Gerstlauer, A., & Geijn, R. A. van de. (2014). Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator. IEEE Transactions on Computers, 63(8), 1854–1867. https://doi.org/10.1109/TC.2014.2315627
Chicago
Pedram, Ardavan, Andreas Gerstlauer, and Robert A. van de Geijn. 2014. “Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator.” IEEE Transactions on Computers 63 (8): 1854–67. doi:10.1109/TC.2014.2315627.