Cite
Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression.
MLA
Yao, Jian, et al. “Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, vol. 33, no. 9, Sept. 2014, pp. 1424–28. EBSCOhost, https://doi.org/10.1109/TCAD.2014.2323197.
APA
Yao, J., Ye, Z., & Wang, Y. (2014). Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 33(9), 1424–1428. https://doi.org/10.1109/TCAD.2014.2323197
Chicago
Yao, Jian, Zuochang Ye, and Yan Wang. 2014. “Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 33 (9): 1424–28. doi:10.1109/TCAD.2014.2323197.