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A 10-Gb/s, 107-mW Double-Edge Pulsewidth Modulation Transceiver.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Apr2014, Vol. 61 Issue 4, p1068-1080. 13p. - Publication Year :
- 2014
-
Abstract
- <?Pub Dtl?>A 10-Gb/s serial link transceiver is demonstrated using double-edged pulsewidth modulation to overcome frequency-dependent losses in electrical interconnects. Time domain modulation is discussed as a means to enhance the spectral efficiency in channels with sharp frequency roll-off similar to multilevel voltage-domain modulation such as 4-PAM. The transmitter and receiver are high-speed programmable digital-to-time and time-to-digital converters that adapt to channel bandwidth characteristics with a timing resolution of 40 ps. This paper presents a low-jitter, phase rotation architecture for cycle-to-cycle transmit pulsewidth control. The transceiver includes an elastic buffer to move data between synchronous and plesiochronous clock domains and is implemented in 45-nm CMOS SOI. Transmitter and receiver functionality is demonstrated to 10 Gb/s at a BER of under 10^-12 and is compared against NRZ schemes at the same rate. The inductor-less transmitter and receiver active circuitry respectively occupy an area of 93\,\times\,94 and 218\,\times\,160 \mum^2, and consume a total 107 mW from a 1.2 V supply. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 61
- Issue :
- 4
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 98013623
- Full Text :
- https://doi.org/10.1109/TCSI.2013.2285894