Cite
A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ.
MLA
Li, Xueqing, et al. “A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers, vol. 61, no. 8, Aug. 2014, pp. 2337–47. EBSCOhost, https://doi.org/10.1109/TCSI.2014.2332248.
APA
Li, X., Wei, Q., Xu, Z., Liu, J., Wang, H., & Yang, H. (2014). A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ. IEEE Transactions on Circuits & Systems. Part I: Regular Papers, 61(8), 2337–2347. https://doi.org/10.1109/TCSI.2014.2332248
Chicago
Li, Xueqing, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang, and Huazhong Yang. 2014. “A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers 61 (8): 2337–47. doi:10.1109/TCSI.2014.2332248.