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Computationally Efficient Modeling of Wafer Temperatures in a Low-Pressure Chemical Vapor Deposition Furnace.
- Source :
-
IEEE Transactions on Semiconductor Manufacturing . May2003, Vol. 16 Issue 2, p342. 9p. 3 Black and White Photographs, 1 Diagram, 2 Charts, 5 Graphs. - Publication Year :
- 2003
-
Abstract
- A new thermal model is developed to predict wafer temperatures within a hot-wall low pressure chemical vapor deposition furnace based on the furnace wall temperatures as measured by thermocouples. Based on an energy balance of the furnace system, this model is a transformed linear model which captures the nonlinear relationship between the furnace wall temperature distribution and the wafer temperature distribution. The model can be solved with a direct algorithm instead of iterative algorithms which are used in all existing thermal models. Since the direct algorithm is noniterative, there is no convergence problem, nor local minima problem, related to nonlinear optimization. In addition, the direct algorithm greatly reduces the computation effort. Configuration factors are calculated by a finite area to finite area method. This avoids numerical integration methods which are much more difficult to implement and require more computation. The simplicity of the model form and the fast algorithm make the model useful for real-time updating and control. Model predictions show excellent agreement with experimental data. [ABSTRACT FROM AUTHOR]
- Subjects :
- *SEMICONDUCTOR wafers
*CHEMICAL vapor deposition
*THERMOCOUPLES
Subjects
Details
- Language :
- English
- ISSN :
- 08946507
- Volume :
- 16
- Issue :
- 2
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Semiconductor Manufacturing
- Publication Type :
- Academic Journal
- Accession number :
- 9864186
- Full Text :
- https://doi.org/10.1109/TSM.2003.811883