A low-noise low-power amplifier for implantable device for neural signal acquisition.

This paper presents a low-noise low-power amplifier for implantable device for neural signal acquisition. By operating MOS transistors in the subthreshold region, smaller low-frequency noise and lower power consumption can be achieved. A low power, low-noise common-drain buffer and a low-noise, high-linearity, low pass filter are used for high frequency noise filtering. Post-layout simulation shows the input referred noise of the system is 2.19microVrms from 10Hz to 10 KHz, power consumption is 55.8microW, and the NEF is 2.53. The amplifier was fabricated using a TSMC 0.18microm 1P6M CMOS process. Simulation results show that this low-noise, low-power amplifier is suitable for implantable device applications.