Design of Power-Scalable Gallium Nitride Class E Power Amplifiers

The need for high power, highly efficient, multi-band and multi-mode radio frequency (RF) and microwave power amplifiers in the commercial and defense wireless industries continues to drive the research and development of gallium nitride (GaN) devices and their implementation in the receiver and transmitter lineups of modern microwave systems. Unlike silicon (Si) or gallium arsenide (GaAs), GaN is a direct wide bandgap semiconductor that permits usage in high voltage and therefore high power applications. Additionally, the increased saturation velocity of GaN allows for operation well into the super high frequency (SHF) portion of the RF spectrum. For the power amplifier designer, active devices utilizing GaN will exhibit power densities almost an order of magnitude greater than comparably sized GaAs devices and almost two orders of magnitude greater than Si devices. Not only does this mean an overall size reduction of an amplifier for a given output power, but it allows GaN to replace specialized components such as the traveling-wave tube (TWT) and other circuits once deemed impossible to realize using solid-state electronics. Designs utilizing GaN in amplifiers, switches, mixers, etc., are able to meet the continually shrinking size, increased power, stringent thermal, and cost requirements of a modern microwave system.There are two relatively straight forward methods used to investigate the intrinsic power scaling properties of a GaN high-electron-mobility transistor (HEMTs) configured as a common source amplifier. The first method involves sweeping the applied drain to source voltage bias and the second method involves scaling the physical size of the transistor. The prior method can be used to evaluate fixed sized transistors while the latter method requires an understanding of the obtainable power density for a given device technology prior to fabrication. Since the power density is also a function of the drain to source voltage bias, an initial iterative component of the design cycle may be required to fully characterize the device technology. If a scalable nonlinear device model is available to the designer, the harmonic balance simulator in most computer aided design (CAD) tools can be used to evaluate device parameters such as the maximum output power and power added efficiency (PAE) using large signal load pull simulations.The circuits presented in this thesis address two power amplifier design approaches commonly used in industry. The first approach utilizes commercially available bare die GaN transistors that can be wire-bonded to matching circuitry on a printed circuit board (PCB). This technique is known as hybrid packaging. The second approach utilizes a fully integrated design or monolithic microwave integrated circuit (MMIC) and the process design kit (PDK) used to design, simulate and layout the power amplifier circuitry before submission to a foundry for fabrication. In both cases, the nonlinear transistor models are used to investigate the power scalability of class E mode GaN power amplifiers and the techniques used to implement such circuits. The design, results, and challenges of each approach are discussed and future work is presented.