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Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems.

Authors :
Slijepcevic, Mladen
Kosmidis, Leonidas
Abella, Jaume
QuiƱones, Eduardo
Cazorla, Francisco J.
Source :
DAC: Annual ACM/IEEE Design Automation Conference; 2014, p1157-1162, 6p
Publication Year :
2014

Abstract

Shared caches in multicores challenge Worst-Case Execution Time (WCET) estimation due to inter-task interferences. Hardware and software cache partitioning address this issue although they complicate data sharing among tasks and the Operating System (OS) task scheduling and migration. In the context of Probabilistic Timing Analysis (PTA) time-randomised caches are used. We propose a new hardware mechanism to control inter-task interferences in shared time-randomised caches without the need of any hardware or software partitioning. Our proposed mechanism effectively bounds inter-task interferences by limiting the cache eviction frequency of each task, while providing tighter WCET estimates than cache partitioning algorithms. In a 4-core multicore processor setup our proposal improves cache partitioning by 56% in terms of guaranteed performance and 16% in terms of average performance. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
0738100X
Database :
Complementary Index
Journal :
DAC: Annual ACM/IEEE Design Automation Conference
Publication Type :
Conference
Accession number :
108916871
Full Text :
https://doi.org/10.1145/2593069.2593235