Analysis of Jitter-Induced Voltage Noise in Clock Channels.

MLA

Rao, Fangyi, and Sammy Hindi. “Analysis of Jitter-Induced Voltage Noise in Clock Channels.” IEEE Transactions on Electromagnetic Compatibility, vol. 57, no. 4, Aug. 2015, pp. 788–95. EBSCOhost, https://doi.org/10.1109/TEMC.2015.2440268.

APA

Rao, F., & Hindi, S. (2015). Analysis of Jitter-Induced Voltage Noise in Clock Channels. IEEE Transactions on Electromagnetic Compatibility, 57(4), 788–795. https://doi.org/10.1109/TEMC.2015.2440268

Chicago

Rao, Fangyi, and Sammy Hindi. 2015. “Analysis of Jitter-Induced Voltage Noise in Clock Channels.” IEEE Transactions on Electromagnetic Compatibility 57 (4): 788–95. doi:10.1109/TEMC.2015.2440268.