3.21 ps ECL gate using InP/InGaAs DHBT technology.

MLA

Ishii, K., et al. “3.21 Ps ECL Gate Using InP/InGaAs DHBT Technology.” Electronics Letters (Institution of Engineering & Technology), vol. 39, no. 20, Oct. 2003, pp. 1434–36. EBSCOhost, https://doi.org/10.1049/el:20030940.

APA

Ishii, K., Nosaka, H., Ida, M., Kurishima, K., & Shibata, T. (2003). 3.21 ps ECL gate using InP/InGaAs DHBT technology. Electronics Letters (Institution of Engineering & Technology), 39(20), 1434–1436. https://doi.org/10.1049/el:20030940

Chicago

Ishii, K., H. Nosaka, M. Ida, K. Kurishima, and T. Shibata. 2003. “3.21 Ps ECL Gate Using InP/InGaAs DHBT Technology.” Electronics Letters (Institution of Engineering & Technology) 39 (20): 1434–36. doi:10.1049/el:20030940.