Three-Level PWM Floating H-Bridge Sinewave Power Inverter for High-Voltage and High-Efficiency Applications.

This paper presents a topology of a single-phase floating full-bridge three-level pulse width modulation (PWM) power inverter suitable for high-voltage/high-power dc–ac conversion. High power efficiency is obtained thanks to the slow (50/60 Hz) biasing of the H-bridge power supply terminals, allowed by a particular arrangement and control of two complementary active neutral point clamped voltage-source converters. As result, the main PWM switching voltage as well as the maximum drain–source voltage $V_{{\rm DSS}} of related transistors are reduced to one-half of the input VDD voltage. This is allowed by the internally generated and accurately balanced middle-node voltage VDD/2. Consequently, advantageous $r_{{\rm DS}({\rm on})}$ of the low-voltage transistors, along with reduced switching PWM voltage result in considerable decreasing of power losses in whole output power range. This paper introduces the main concept of the floating H-bridge topology, and presents in detail the circuit realization. The performances are demonstrated on $450 V_{{\rm DC}}/230 V_{{\rm AC}}$ 2 kW power inverter exhibiting 98.6% peak efficiency and realized in very small $100\times 60\times 30$ mm3 volume. [ABSTRACT FROM AUTHOR]