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Balancing Control Schemes for Modular Multilevel Converters Using Virtual Loop Mapping With Fault Tolerance Capabilities.

Authors :
Mei, Jun
Ji, Yu
Tian, Jie
Huang, Can
Lu, Xiaojun
Du, Xiaozhou
Xie, Yeyuan
Hu, Qinran
Ma, Tian
Source :
IEEE Transactions on Industrial Electronics; Jan2016, Vol. 63 Issue 1, p38-48, 11p
Publication Year :
2016

Abstract

A novel complementary phase disposition pulsewidth modulation method for the modular multilevel converter (MMC) with a limited number of submodules is proposed in this paper. Compared with the previous works, more practical issues have been considered, and the corresponding solutions have been provided. First, a new preset PWM signal mapping sequence and an improved virtual loop mapping (VLM) are used in the modulation. This method not only achieves a favorable capacitor voltage balance in the symmetry system but lowers the switching frequency of MMC's devices. Second, to further reduce the switching frequency, the unbalance margin of capacitor voltages is adopted to achieve the switching between the VLM and the selective VLM (SVLM). Moreover, the system robustness has been improved by considering the situation of symmetry losing, like cell fails; in these cases, the capacitor voltages of the upper and lower arms are balanced through the collaboration of the SVLM and the reconfigurable VLM. Finally, the effectiveness of the proposed method has been verified with simulation and experimental studies. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780046
Volume :
63
Issue :
1
Database :
Complementary Index
Journal :
IEEE Transactions on Industrial Electronics
Publication Type :
Academic Journal
Accession number :
115132887
Full Text :
https://doi.org/10.1109/TIE.2015.2472356