Access-in-turn test architecture for low-power test application.

MLA

Wang, Weizheng, et al. “Access-in-Turn Test Architecture for Low-Power Test Application.” International Journal of Electronics, vol. 104, no. 3, Mar. 2017, pp. 433–41. EBSCOhost, https://doi.org/10.1080/00207217.2016.1218062.

APA

Wang, W., Wang, J., Wang, Z., & Xiang, L. (2017). Access-in-turn test architecture for low-power test application. International Journal of Electronics, 104(3), 433–441. https://doi.org/10.1080/00207217.2016.1218062

Chicago

Wang, Weizheng, JinCheng Wang, Zengyun Wang, and Lingyun Xiang. 2017. “Access-in-Turn Test Architecture for Low-Power Test Application.” International Journal of Electronics 104 (3): 433–41. doi:10.1080/00207217.2016.1218062.