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Circuit Synthesis for Guaranteed Positive Sparse Realization of Passive State-Space Models.

Authors :
Villena, Jorge Fernandez
Silveira, Luis Miguel
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers; Jun2017, Vol. 64 Issue 6, p1576-1587, 12p
Publication Year :
2017

Abstract

This paper introduces a methodology able to produce an exact valid and physically meaningful circuit representation out of generic multi-port passive linear state-space models. The proposed method has a strong theoretical relevance as it allows the generation of equivalent netlists whose RLC values are guaranteed positive, without applying any additional approximations, and based only on coordinate transformations and circuit laws interpretation. In this sense it can be viewed as a generalization of Foster's synthesis that is guaranteed to produce a circuit description containing only elements with physical meaning. In addition, it also presents pratical advantages, as it generates a very sparse circuit, whose usage is highly efficient within standard simulation and analysis platforms. Furthermore, the synthesized circuit can be easily included in any standard environment for simulation, verification, delay calculation, symbolic analysis, etc., and in combination with other models for system-level detailed simulation, which further increases the practical relevance of the proposed approach. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
64
Issue :
6
Database :
Complementary Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
123391865
Full Text :
https://doi.org/10.1109/TCSI.2016.2561738