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Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things.

Authors :
Jiann-Shiun Yuan
Jie Lin
Alasad, Qutaiba
Taheri, Shayan
Source :
Electronics (2079-9292); 2017, Vol. 6 Issue 3, p67, 55p
Publication Year :
2017

Abstract

In this review article for Internet of Things (IoT) applications, important low-power design techniques for digital and mixed-signal analog-digital converter (ADC) circuits are presented. Emerging low voltage logic devices and non-volatile memories (NVMs) beyond CMOS are illustrated. In addition, energy-constrained hardware security issues are reviewed. Specifically, light-weight encryption-based correlational power analysis, successive approximation register (SAR) ADC security using tunnel field effect transistors (FETs), logic obfuscation using silicon nanowire FETs, and all-spin logic devices are highlighted. Furthermore, a novel ultra-low power design using bio-inspired neuromorphic computing and spiking neural network security are discussed. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
20799292
Volume :
6
Issue :
3
Database :
Complementary Index
Journal :
Electronics (2079-9292)
Publication Type :
Academic Journal
Accession number :
125300107
Full Text :
https://doi.org/10.3390/electronics6030067