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Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications.
- Source :
- Applied Physics Letters; 11/27/2017, Vol. 111 Issue 22, p1-5, 5p
- Publication Year :
- 2017
-
Abstract
- The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al<subscript>2</subscript>O<subscript>3</subscript>/HfO<subscript>2</subscript>/Al<subscript>2</subscript>O<subscript>3</subscript>) and an atomically thin MoS<subscript>2</subscript> channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 10<superscript>7</superscript>. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS<subscript>2</subscript> and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays. [ABSTRACT FROM AUTHOR]
- Subjects :
- DIELECTRICS
SEMICONDUCTORS
METADATA
LIGHT
ELECTROMAGNETIC waves
Subjects
Details
- Language :
- English
- ISSN :
- 00036951
- Volume :
- 111
- Issue :
- 22
- Database :
- Complementary Index
- Journal :
- Applied Physics Letters
- Publication Type :
- Academic Journal
- Accession number :
- 126644338
- Full Text :
- https://doi.org/10.1063/1.5000552