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Thermal Aware Test Scheduling for NTV Circuit.

Authors :
Lim, Jaeil
Oh, Hyunggoy
Kim, Heetae
Kang, Sungho
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Apr2018, Vol. 37 Issue 4, p906-910, 5p
Publication Year :
2018

Abstract

Although the near threshold voltage (NTV) design has achieved energy efficiency, certain challenges remain regarding its application. In this paper, we describe the analysis of thermally induced reliability concern in test process. In an NTV environment, the thermal dependency of a circuit delay is changed, and a difference in thermal constraints from that in a nominal voltage design exists. In addition, we propose a new test scheduling method for NTV circuits that alleviates the thermal constraints in system-on-chip test processes. Our simulation results show that the test time could be reduced while minimizing the reliability loss. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780070
Volume :
37
Issue :
4
Database :
Complementary Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
128555074
Full Text :
https://doi.org/10.1109/TCAD.2017.2729282