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Ultralow-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach-Zehnder Modulator anc. 28-nm CMOS Driver.

Authors :
Shinsuke Tanaka
Takasi Simoyama
Tsuyoshi Aoki
Toshihiko Mori
Shigeaki Sekiguchi
Seok-Hwan Jeong
Tatsuya Usuki
Yu Tanaka
Ken Morito
Source :
Journal of Lightwave Technology; Mar2018, Vol. 36 Issue 5, p1275-1280, 6p
Publication Year :
2018

Abstract

A highly power-efficient silicon (Si) photonic PAM4 transmitter was developed by integrating a Si segmented Mach- Zehnder modulator and a CMOS driver chip. Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation. A passive RC equalizing technique was adopted to extend the modulation bandwidth up to 20 GHz while maintaining a low power consumption. By integrating a passive RC filter within the photonics chip, we achieved a very compact foot print for the transmitter (450 x 950 µm). The fabricated modulator exhibited a low VπL of 0.19 V⋅cm and a moderate insertion loss of 23.7 dB/cm. The transmitter successfully demonstrated clear eye openings of PAM4 signal up to 56 Gbps together with a record-high-efficiency of 1.59 mW/Gbps. A low bit-error- rate below KP4 FEC limit (< 2.0 x 10<superscript>-4</superscript>) was also confirmed at 50-Gbps PAM4 operation even with an unequalized receiver. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07338724
Volume :
36
Issue :
5
Database :
Complementary Index
Journal :
Journal of Lightwave Technology
Publication Type :
Academic Journal
Accession number :
128848264
Full Text :
https://doi.org/10.1109/JLT.2018.2799965