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Engineering Negative Differential Resistance in NCFETs for Analog Applications.

Authors :
Agarwal, Harshit
Kushwaha, Pragya
Duarte, Juan Pablo
Lin, Yen-Kai
Sachid, Angada B.
Kao, Ming-Yen
Chang, Huan-Lin
Salahuddin, Sayeef
Hu, Chenming
Source :
IEEE Transactions on Electron Devices; May2018, Vol. 65 Issue 5, p2033-2039, 7p
Publication Year :
2018

Abstract

In negative capacitance field-effect transistors (NCFETs), drain current may decrease with increasing ${V}_{\mathrm {ds}}$ in the saturation region, leading to negative differential resistance (NDR). While NDR is useful for oscillator design, it is undesirable for most analog circuits. On the other hand, the tendency toward NDR may be used to reduce the normally positive output conductance ( ${g}_{ \mathrm {ds}}$ ) of a short-channel transistor to a nearly zero positive value to achieve higher voltage gain. In this paper, we analyze the NDR effect for NCFET in the static limit and demonstrate that it can be engineered to reduce ${g}_{\mathrm {ds}}$ degradation in short-channel devices. Small and positive $g_{\mathrm{ ds}}$ is achieved without compromising the subthreshold gain, which is crucial for analog applications. The 7-nm ITRS 2.0 FinFET with 0.7 V ${V}_{\mathrm {dd}}$ is used as the baseline device in this paper. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
65
Issue :
5
Database :
Complementary Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
129949428
Full Text :
https://doi.org/10.1109/TED.2018.2817238