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A 1.24 $\mu$ A Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation.

Authors :
Magod, Raveesh
Bakkaloglu, Bertan
Manandhar, Sanjeev
Source :
IEEE Journal of Solid-State Circuits; Aug2018, Vol. 53 Issue 8, p2356-2367, 12p
Publication Year :
2018

Abstract

Supply regulation using low quiescent current linear regulators helps in extending the battery life of power aware applications with very long standby time. A 1.24 $\mu \text{A}$ quiescent current NMOS low dropout (LDO) that uses a hybrid bias current generator (HBCG) which boosts the bias current dynamically and adaptively to improve the transient response is presented in this paper. A bias-current scalable error amplifier with an on-demand pull-up/pull-down buffer drives the NMOS pass device. The error amplifier is powered with an integrated dynamic frequency charge pump to ensure low dropout voltage. A low-power relaxation oscillator (LPRO) generates the charge pump clocks. A novel switched-capacitor pole tracking (SCPT) compensation scheme is proposed to ensure stability up to maximum load current of 150 mA with a low-ESR 1 $\mu \text{F}$ output capacitor. Designed in a 0.25 $\mu \text{m}$ CMOS process, the LDO has an output voltage range of 1–3 V, a dropout voltage of 240 mV, and a core area of 0.11 mm2. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189200
Volume :
53
Issue :
8
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
130886469
Full Text :
https://doi.org/10.1109/JSSC.2018.2820708