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A 1.2-V 2.41-GHz Three-Stage CMOS OTA With Efficient Frequency Compensation Technique.
- Source :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers; Jan2019, Vol. 66 Issue 1, p20-30, 11p
- Publication Year :
- 2019
-
Abstract
- A performance-boosting frequency-compensation technique, called feed-forward Gm-stage and regular Miller plus indirect compensation (FGRMIC), is presented in this paper. The proposed structure consists of three parts that ensure the stability and significantly improve the performance, such as gain–bandwidth product (GBW), slew rate, and sensitivity. The first part is a feed-forward transconductance stage, and the second part is a Miller capacitor in series with one resistor. The third part is an indirect compensation capacitor combined with a resistor. Detailed theoretical analysis and design considerations are provided to demonstrate the stability of the compensation scheme. Measurement results show that the implemented amplifier, driving a 2-pF load capacitance, achieves a GBW of 2.41 GHz with a phase margin of 82.6° while consuming 12.6 mW with a 1.2-V supply voltage in a TSMC 65-nm CMOS technology. Large-signal step response indicates that the implemented three-stage FGRMIC amplifier settles with 1% settling error within 1.41 ns. [ABSTRACT FROM AUTHOR]
- Subjects :
- CMOS amplifiers
ELECTRIC admittance
CAPACITORS
Subjects
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 66
- Issue :
- 1
- Database :
- Complementary Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 133501379
- Full Text :
- https://doi.org/10.1109/TCSI.2018.2852334